Advantech PCI-1710HG Specifikace stáhnout pdf (Strana 144)

134

Counter 1 & 2

Counter 1 and counter 2 of the counter chip are cascaded to create a

32-bit timer for the pacer trigger. A low-to-high edge of counter 2

output (PACER_OUT) will trigger an A/D conversion. At the same

time, you can use this signal as a synchronous signal for other

applications.

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Advantech PCI-1710HG Specifikace Strana 144