Advantech PCI-1718 Series Uživatelský manuál Strana 6
- Strana / 94
- Tabulka s obsahem
- KNIHY
Hodnocené. / 5. Na základě hodnocení zákazníků
PCI-1718 Series User Manual vi
1718 Series 28
3.3.1 I/O Connector Signal Description ................................ 29
Table 3.9:I/O Connector Signal Descriptions .............. 29
3.3.2 Analog Input Connections ........................................... 30
Figure 3.3:Analog Output Connections ....................... 33
3.3.3 Digital Signal Connections .......................................... 34
3.4 Field Wiring Considerations .......................................... 35
Chapter 4 Programming Guide ..................................... 38
4.1 Overview ......................................................................... 38
4.2 Programming with the Driver ......................................... 38
4.3 Register Programming..................................................... 38
4.3.1 Software Trigger and Polling ....................................... 39
4.3.2 Pacer Trigger Mode with Interrupt .............................. 41
4.3.3 Pacer Trigger Mode with Interrupt and FIFO .............. 45
4.4 Programming with LabVIEW and ActiveDAQ.............. 49
Appendix A Specifications ................................................. 52
A.1 Analog Input.................................................................... 52
A.2 Analog Output................................................................. 53
A.3 Digital Input .................................................................... 54
A.4 Digital Output.................................................................. 54
A.5 Counter/Timer ................................................................. 55
A.6 General ............................................................................ 56
Appendix B Block Diagrams ............................................. 58
Appendix C Register Structure & Format....................... 60
C.1 Overview ......................................................................... 60
C.2 I/O Port Address Map .................................................... 60
Table C.1:PCI-1718HDU/HGU Register Format (Part 1)
61
Table C.2:PCI-1718HDU/HGU Register Format (Part 2)
62
Table C.3:PCI-1718HDU/HGU Register Format (Part 3)
63
C.3 A/D Data and Channels — BASE+00H~01H ................ 64
Table C.4:Register for A/D Data and Channels .......... 64
C.4 Software A/D Trigger — BASE+00H ............................ 64
Table C.5:Register for Software A/D Trigger ............. 64
C.5 A/D Range Control — BASE+01H ............................... 65
Table C.6:Register for A/D Range Control ................. 65
C.6 MUX Scan Channel Control — BASE+02H.................. 67
Table C.7:Register for MUX Scan Channel Control ... 67
C.7 MUX Scan Channel Status — BASE+02H .................... 68
Table C.8:Register for MUX Scan Channel Status ..... 68
C.8 Digital I/O Registers - BASE + 03/0BH ......................... 68
Table C.9:Register for Digital Output ......................... 68
Table C.10:Register for Digital Output ...................... 69
C.9 D/A Output — BASE+04/05H ....................................... 69
Table C.11:Register for D/A Output ........................... 69
C.10 FIFO Interrupt Control — BASE+06H........................... 70
- PCI-1718 Series 1
- User Manual 1
- Contents 5
- Introduction 9
- Chapter 1 Introduction 10
- 1.1 Features 11
- 1.2 Applications 12
- 1.3 Installation Guide 13
- PCI-1718 Series User Manual 6 14
- 1.4 Software Overview 15
- PCI-1718 Series User Manual 8 16
- 9 Chapter 1 17
- 1.6 Accessories 18
- Installation 19
- Chapter 2 Installation 20
- 2.2 Driver Installation 21
- 2.3 Hardware Installation 23
- 17 Chapter 2 25
- Signal Connections 27
- Chapter 3 Signal Connections 28
- 23 Chapter 3 31
- Jumper Function description 31
- JP10 5 V (default) 31
- JP8 1 MHz (default) 32
- 27 Chapter 3 35
- Reset status after hot reset 35
- (default) 35
- 3.3 Signal Connections 36
- 31 Chapter 3 39
- 33 Chapter 3 41
- 35 Chapter 3 43
- Programming Guide 45
- Chapter 4 Programming Guide 46
- 39 Chapter 4 47
- 41 Chapter 4 49
- 43 Chapter 4 51
- 45 Chapter 4 53
- 47 Chapter 4 55
- 49 Chapter 4 57
- Specifications 59
- Appendix A Specifications 60
- A.2 Analog Output 61
- A.3 Digital Input 62
- A.4 Digital Output 62
- A.5 Counter/Timer 63
- A.6 General 64
- Block Diagrams 65
- Appendix B Block Diagrams 66
- Register Structure & 67
- C.1 Overview 68
- C.2 I/O Port Address Map 68
- 65 Appendix C 73
- Write A/D range control 73
- Bit # 76543210 73
- BASE + 01H XXXXG3*G2*G1G0 73
- 67 Appendix C 75
- Bit # 7 6543210 75
- C.9 D/A Output — BASE+04/05H 77
- Write FIFO interrupt control 78
- Bit # 7 654321 0 78
- C.12 A/D Status — BASE+08H 79
- C.13 A/D Control — BASE+09H 81
- Write Timer/Counter enable 82
- BASE + 0AH TC1 TC0 82
- C.18 FIFO Status — BASE+19H 84
- C.19 FIFO Clear — BASE+19H 84
- 77 Appendix C 85
- 79 Appendix C 87
- Calibration 89
- Appendix D Calibration 90
- D.1 VR Assignment 91
- D.2 A/D Calibration 92
- D.3 D/A Calibration 93
Související produkty a manuály pro Digitální a analogové I / O moduly Advantech PCI-1718 Series
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