Advantech PCI-1718 Series Uživatelský manuál stáhnout pdf (Strana 80)

PCI-1718 Series User Manual 72

U/B Unipolar/bipolar mode indicator

0 Bipolar mode

1 Unipolar mode

MUX Single-ended/differential channel indicator

0 8 differential channels

1 16 single-ended channels

INT Data valid

0 No A/D conversion has been completed since the last time the INT

bit was cleared. Values in the A/D data registers are not valid data.

1 The A/D conversion has finished, and converted data is ready. If the

INTE bit of the control register (BASE +09H) is set, an interrupt

signal will be sent to the PC bus through interrupt level IRQn, where

n is specified by bits I2, I1 and I0 of the control register. Though the

A/D status register is read-only, writing to it with any value will

clear the INT bit.

CN3 to CN0 When EOC = 0, these status bits contain the channel

number of the next channel to be converted.

Note:

If you trigger the A/D conversion with the on-board pacer or an external

pulse, your software should check the INT bit, not the EOC bit, before it

reads the conversion data.

EOC can equal 0 in two different situations: the conversion has com-

pleted or no conversion has been started. Your software should therefore

wait for the signal SNT = 1 before it reads the conversion data. It should

then clear the INT bit by writing any value to the A/D status register

BASE+08H.

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Advantech PCI-1718 Series Uživatelský manuál Strana 80